1. Field of the Invention
Embodiments of the present invention relate to methods for manufacturing a semiconductor device, and more particularly, to methods for manufacturing a semiconductor device in which a metal line and a contact are formed.
2. Description of the Related Art
A copper line can be used to improve an operational speed of a semiconductor device. A copper line is usually manufactured by a damascene process due to difficulty in etching. Damascene processes include dual-damascene processes and single-damascene processes. In dual-damascene processes, an etching stop layer and an interlayer dielectric are deposited in multiple layers and etched, thereby forming via holes and trenches. Next, a diffusion stop layer and a seed layer are formed at the upper part of the whole structure including the via holes and the trenches. A copper line is vapor-deposited through electroplating, and the copper is polished by chemical mechanical polishing (CMP) such that a via plug and the copper line are formed simultaneously.
However, since copper atoms may diffuse to a lower transistor and thereby cause contamination when embedding the copper in the contact holes, a single-damascene process may be used. In a single-damascene process, tungsten is embedded in the contact holes and the copper line is formed at only the upper part of the tungsten. When using a single-damascene process, however, misalignment may be generated between the contact holes embedded with tungsten and the upper copper line. Furthermore, when the trenches are etched to form the upper copper line, defects may be caused due to variations in processing capability. These defects include an opening between the copper line and the contact hole or a void of the copper line.